1. Field of the Invention
The present invention relates generally to differential amplifiers. More particularly, the present invention relates to a differential amplifier used, for example, in an input circuit of an operational amplifier or an output circuit of a driving circuit of a display device such as a liquid crystal display device.
2. Description of the Related Art
A differential amplifier is used in an input circuit of an operational amplifier. The input circuit includes a noninverting input stage and an inverting input stage. A differential amplifier itself can be an operational amplifier. A differential amplifier is also used for an output circuit of a driving circuit of a display device such as a liquid crystal display device. In such a case, a voltage follower having a high input impedance and low output impedance is formed by negative feedback of an output from the differential amplifier into an inverting input stage. Some of such differential amplifiers include an output buffer for outputting a differential output from the differential amplifier through an output transistor. The output transistor is formed as a source follower or as an emitter follower in the case where a bipolar transistor is used as the output transistor.
FIG. 7 is a circuit diagram showing a prior art differential amplifier using MOSFETs (metal-oxide-semiconductor field effect transistors). In FIG. 7, the differential amplifier includes transistors N1 to N3 each formed of an enhancement-type n-channel MOSFET and transistors P4 and P5 each formed of an enhancement-type p-channel MOSFET. The transistors N1 and N2 are configured as a differential pair. Specifically, the transistor N1 is an input transistor having a gate supplied with an input voltage V.sub.IN+ representing a noninverting input stage, and the transistor N2 is an input transistor having a gate supplied with an input voltage V.sub.IN- representing an inverting input stage. The transistor N3 has a gate supplied with a bias voltage V.sub.b for producing a constant current, thereby forming a constant current circuit. The transistors P4 and P5 form a current mirror circuit.
In a differential amplifier such as that shown in FIG. 7, when the gates of the transistors N1 and N2 are supplied with input voltages V.sub.IN+ and V.sub.IN-, respectively, the transistors N1 and N2 become active. The constant current circuit formed by the transistor N3 and the current mirror circuit formed by the transistors P4 and P5 are balanced with each other, and thus a difference voltage between the input voltages V.sub.IN+ and V.sub.IN- is amplified and outputted as an output voltage V.sub.OUT.
The transistors N1 and N2, which are each formed of an enhancement MOSFET, turn off when the input voltages V.sub.IN+ and V.sub.IN- are respectively reduced to levels lower than the threshold voltages of the transistors N1 and N2. FIG. 9 illustrates the relationship between the input voltage V.sub.IN+ and the output voltage V.sub.OUT when the input voltage V.sub.IN- is 0 volts (V). As is shown, when the input voltage V.sub.IN+ is lower than the threshold voltage of the transistor N1, the output voltage V.sub.OUT remains fixed at 0 volts.
As a result, the lowest level of the output voltage V.sub.OUT which can be obtained from the input voltages V.sub.IN+ and V.sub.IN- is limited by the threshold voltage of the enhancement MOSFET, e.g., N1, thereby narrowing the dynamic range of the differential amplifier.
FIG. 8 is a circuit diagram of another prior art differential amplifier. In FIG. 8, the differential amplifier includes a differential amplifying section 1 which is identical to the differential amplifier shown in FIG. 7. In addition, the differential amplifier includes an output buffer section 2. The output buffer section 2 includes transistors N6 and N7 each formed of an enhancement-type n-channel MOSFET. The transistor N7 has a gate supplied with a bias voltage V.sub.b0 for providing a constant current, thereby forming a constant current circuit. The transistor N6 has a source connected to a drain of the transistor N7, thereby forming a source follower and acts an output transistor.
The differential amplifier shown in FIG. 8 has associated therewith another problem in addition to the one described above with respect to FIGS. 7 and 9. The transistor N6 used as the source follower is formed of an enhancement-type MOSFET. Accordingly, the voltage applied between the gate and the source of the transistor N6 cannot be lower than the threshold voltage thereof. Thus, the highest amplitude level of the output voltage V.sub.OUT provided at the source of the transistor N6 is limited to a level which is lower than the voltage of a power source V.sub.DD by the threshold voltage of transistor N6, thereby narrowing the dynamic range.
Japanese Laid-Open Patent Publication No. 61-225911 discloses a system for improving dynamic range by further lowering the lowest obtainable output voltage. Specifically, the reference discloses applying a specified bias voltage to the substrate of two transistors of a differential amplifier. In such a system, the level of the bias voltage which can be applied is restricted by a parasitic diode which is generated between the substrate and the well area. Accordingly, the lowest limit is not sufficiently lowered. Further, a separate power supply is required for applying the bias voltage to the substrate, thus undesirably increasing the number of peripheral components.